What is the Digital Switching System?
A Digital switching system, in general, is one in which signals are switched in digital form. These signals may represent speech or data. The digital signals of several speech samples are time-multiplexed on a common media before being switched through the system.
To connect any two subscribers, it is necessary to interconnect the time-slots of the two speech samples which may be on the same or different PCM highways. The digitalized speech samples are switched in two modes, viz., Time Switching and Space Switching. This Time Division Multiplex Digital Switching System is popularly known as Digital Switching System.
In this handout, general principles of time and space switching are discussed. A practical digital switch, comprising of both time and space stages, is also explained.
4.1 Time and Space Switching
Generally, a digital switching system several time division multiplexed (PCM) samples. These PCM samples are conveyed on PCM highways (the common path over which many channels can pass with separation achieved by time division.). The switching of calls in this environment requires placing digital samples from one time-slot of a PCM multiplex in the same or different time-slot of another PAM multiplex.
For example, PCM samples appearing in TS6 of I/C PCM HWY1 are transferred to TS18 of O/G PCM HWY2, via the digital switch, as shown in Fig1.
The interconnection of time-slots, i.e., switching of digital signals can be achieved using two different modes of operation. These modes are: –
- Space Switching
- Time switching
Usually, a combination of both modes is used.
In the space-switching mode, corresponding time-slots of I/C and O/G PCM highways are interconnected. A sample, in a given time-slot, TSi of an I/C HWY, says HWY1, is switched to the same time-slot, TSi of an O/G HWY, SAY HWY2. Obviously, there is no delay in switching off the sample from one highway to another highway since the sample transfer takes place in the same time-slot of the PCM frame.
Time Switching, on the other hand, involves the interconnection of different time-slots on the incoming and outgoing highways by re-assigning the channel sequence. For example, a time-slot TSX of an I/C Highway can be connected to a different time-slot., TSy, of the outgoing highway. In other words, a time switch is, basically, a time-slot changer.
The Digital Space Switch consists of several input highways, X1, X2,…Xn and several output highways, Y1, Y2,………….Ym, interconnected by a crosspoint matrix of n rows and m columns. The individual crosspoint consists of electronic AND gates. The operation of an appropriate crosspoint connects any channel, a, of I/C PCM highway to the same channel, a, of O/G PCM highway, during each appropriate time-slot which occurs once per frame as shown in Fig 2. During other time-slots, the same crosspoint may be used to connect other channels. This crosspoint matrix works as a normal space divided matrix with full availability between incoming and outgoing highways during each time-slot.
Each crosspoint column, associated with one O/G highway, is assigned a column of control memory. The control memory has as many words as there is time-slot per frame in the PCM signal. In practice, this number could range from 32 to 1024. Each crosspoint in the column is assigned a binary address so that only one crosspoint per column is closed during each time-slot. The binary addresses are stored in the control memory, in the order of time-slots. The word size of the control memory is x bits, so that 2x = n, where n is the number of cross points in each column.
A new word is read from the control memory during each time-slot, in a cyclic order. Each word is read during its corresponding time-slot, i.e., Word 0 (corresponding to TS0), followed by word 1 (corresponding to TS1) and so on. The word contents are contained in the vertical address lines for the duration of the time-slot. Thus, the cross point corresponding to the address is operated during a particular time-slot. This cross-point operates every time the particular time-slot appears at the inlet in successive frames. normally, a call may last for around a million frames.
As the next time-slot follows, the control memory is also advanced by one step, so that during each new time-slot new corresponding words are read from the various control memory columns. This results in the operation of a completely different set of cross points being activated in different columns. Depending upon the number of time-slots in one frame, this time-division action increases the utilization of cross point 32 to 1024 times compared with that of the conventional space-divided switch matrix.
Consider the transfer of a sample arriving in TS7 of I/C HWY X1 to O/G HWY Y3. Since this is a space switch, there will be no reordering of time i.e., the sample will be transferred without any time delay, via the appropriate cross point. In other words, the objective is to connect the TS7 of HWY X1 and TS7 of HWY Y3.
The central control (CC) selects the control memory column corresponding output highway Y3. In this column, the memory location corresponding to the TS7 is chosen. The address of the cross point is written in this location, i.e., 1, in binary, is written in location 7, as shown in fig 2.This cross point remains operated for the duration of the time-slot TS7, in each successive frame till the call lasts.
For the disconnection of call, the CC erases the contents of the control memory locations, corresponding to the concerned time-slots. The AND gates, therefore, are disabled and transfer of samples is halted.
Practical Space Switch
In a practical switch, the digital bits are transmitted in parallel rather than serially, through the switching matrix.
In a serial 32 time-slots PCM multiplex, 2048 Kb/s are carried on a single wire sequentially, i.e., all the bits of the various time-slots follow one another. This single wire stream of bits, when fed to Serial to Parallel Converter is converted into an 8-wire parallel output. For example, all 8 bits corresponding to TS3 serial input are available simultaneously on eight output wires (one bit on each output wire), during just one-bit period, as shown in fig.3. This parallel output on the eight wires is fed to the switching matrix. It can be seen that during one full time-slot period, only one bit is carried on each output line, whereas 8 bits are carried on the input line during this period. Therefore, bit rate on individual output wires is reduced to 1/8th of input bit rate=2048/8=256Kb/s